James R. (Bob) Davis
Mr. Davis is a Technologist, senior consultant and manager, specializing in scalable system architecture, hardware and system engineering, bus structures, signal integrity, system reliability, technology assessment, project management, short term and long term product strategy. His more than 30 years of experience in electronics has been in leadership technical, management, and consulting positions. He is a visionary and “Out-of-the-Box” solution producer as demonstrated by his accomplishments.
He plans to continue driving forward by making your company a market leader, meeting corporate goals, and more profitable.
His accomplishments include:
Led a small task group to become a profitable division building complex integrated circuit testers. This work included the architecture of a new generation of products including an algorithmic memory product tester and stored pattern tester for microprocessor and peripheral products.
Performed market surveys, wrote, and executed, a business plan for a new board level product line and delivered board level products. This division was going to be closed down due to corporate redirection, this saved the division and produced the new product line on time and slightly under budget with a 95% ROI in first year! These products included initiating the first application of Western Electric UNIX (v7) on a microprocessor (Z8000) and the design of a new bus structure (ZBI) to support it. This action saved 50+ man-years of design effort and leveraged the 180+ man-years of ATT effort in Unix. This was a large cost saving to the company and shorten the time to a new OS..
Defined the use and term Personal Computer as Strategic Marketing Manager at Intel. The definition in 1976, presented at a conference in Geneva was “Small enough to prevent a hernia when lifting it and less expensive than the family car”. Proposal to build Personal Computers at Intel, using Intel processors, was rejected by Andy Grove as not having a sufficient ROI with very limited market potential.
Defined and supported client system architectures from dedicated controllers to server class products. This included processor front side busses from P6 through Alpha, back side processor busses to 1.2 GHz, peripheral ISA to PCIX busses and proprietary structures to 1 GHz. Work has included extensive bus and board design and analysis for signal integrity, quality and timing using Hspice and QUAD XNS modeling for verification of design.
Implemented board level products ranging from Professional Audio/Video recorder control systems, Local Area network boards from ARCNET to Gigabit Ethernet adapter boards on ISA to PCIX boards.
Market definition and analysis, systems architecture, design and implementation of an executive decision support workstation in a multiprocessor system. In this design he designed a Parallel Local Area Network and a 2.5 to 5 Gigabyte file backup system using Helical Scan Tape Technology. Completed business plan for JAC Tape and converted to 8mm tape with support from Kodak.
Engineered a secure communications and file encrypting system for a startup company, including all the hardware architecture, software architecture, design, implementation and demonstration.
Authored and implemented an Engineering Procedure to guide a product from concept through manufacturing introduction. This plan has been implemented at 4 companies.
Has installed UNIX systems from Version 7 to System 5/BSD4.2 and has been Systems Administrator for systems from 68000 based to Sun based and VAX 750 with AT&T source code license. This included C coding, and some required assembler coding, as needed with kernel modifications. Supported the first installation of UNIX on the Stanford University Network (SUN) Multibus(1) 68010 based processor board.
Designed and implemented power distribution system for SELV (<60V) power for Microprocessors.
Has provided applications support for CCDs, TTL, ECL, CMOS, PROM, and Microprocessor devices.
Designed systems with microprocessors ranging from the Intel 4004 4 bit processor, in the first triple processor, microprocessor configuration, from MicroSparc through UltraSparc(1-3) through Pentium(1-4), Alpha and AMD K7(Athlon) systems and MP structures.
Software Engineer and coder for Space Shuttle experimental package software in Assembler and Pascal.
Has written and given lectures and seminars on back-plane bus structures, their selection criteria and the effect of those structures on various product strategies.
Provided strategic marketing to guide a company into the personal computer world.
Started and chaired the international group (IEC) that created the VSB structure.
Created initial study groups to develop system growth technology resulting in Working Groups and Standards for IEEE 1394, IEEE 1596(SCI), and projects IEEE P1996, IEEE P1575, IEEE P1537, and IEEE P754R. Also oversaw and promoted more than 15 new standards in bus structures, software, and communications for the IEEE Computer Society including Futurebus, NuBus, MultibusII, VME, STD, VMS, VersaBus, COMBus, and STE.
Serving as Editor for IEEE Project P1996 – HiRelPCI standard working group to build very high reliability, very extensible standard for Communication, Telecommunications, and Traffic control.
Worked with Society of Motion Picture and Television Engineers as well as the Movie industry in defining the new method of describing the color representation and luminance specification for Digital Cinema. Participated in DC28 groups for Mastering, Colorimetery, Conditional Access, Transportation, Audio, Theater Systems and Projection Systems. Presented papers on Data Structures and Transportation of the Digital Cinema Distribution Masters (DCDM) to theaters.
Mr. Davis held the following management, consulting and appointed positions:
Technical Director/Architect for a $B storage firm. This included investigation and recommendations of alternat architectures for future storage systems. Part of this required the design and implementation of software to analyses the usage of information stored on the systems. The result was a requirement to implement Hierarchical Storage Management system to meet customer demands for more cost effective storage.
Consultant to an international consulting firm providing technical support and technology assessment for large and small clients.
Designer of Architecture and Bus Structures for large computer company division.
Founder of a consulting firm serving the clients worldwide in Signal Integrity and high-speed board and system design.
Founder and Vice President of Engineering of a computer company serving the Executive decision support needs.
Vice President of Engineering for a company building encryption devices.
Division General Manager of a high‑speed test systems division of a large semiconductor company.
Product Line Manager with P/L responsibility for a Board Level product line of a major semiconductor supplier.
Strategic Marketing Manager for Personal Computer Products with a leading semiconductor company.
Member of the IEEE Standards Board, IEEE Standards Board Review Committee (RevCom), IEEE Standards Board Procedures Committee (ProCom). 2003 - 2004
Chairman of the IEEE Computer Society Microprocessor Standards Committee 1984-1987, 2001-2005
Chairman of the IEC/ISO JTC1/SC47B Working Group 4 on System Architecture Standards.
Technical Advisor and Chief Delegate for the United States for Microprocessors for ISO/IEC JTC1/SC47B.
Chairman IEEE P1996 – High Relability PCI Bus. A fully redundant extensible structure for critical applications.
Initial Chairperson IEEE P754R – Floating Point Standards Committee revision to meet current and new requirements.
Editor and Coordinator IEEE P1575 Advanced Microcomputer Power Distribution System
Mr. Davis has received his MS degree in Electrical Engineering from Stanford University and his MBA degree from Pepperdine University.
